fix: report connected source ports missing PCB mappings

[AnasSarkiz]

Summary

• validate that every connected, PCB-backed source port has an owner-matched PCB port after footprints and port matching have settled
• emit the canonical pcb_port_not_matched_error and feed it into Core's existing pre-routing placement-error gate
• follow internal pin connectivity while excluding unconnected/source-only ports and components with known footprint-load failures
• add a MangoPi-shaped regression for F1C200S pin 89 and GD5F1GQ5UEYIGR pin 9, plus a false-positive guard

Root cause

The MangoPi imports provide thermalpad as a required physical alias, but their wrapper spreads caller props after the imported pinLabels. A board-level pinLabels override therefore erases that alias before Core receives the <chip>. The footprint exposes only thermalpad, so Core cannot authoritatively reconstruct pin 89 or pin 9 without guessing from footprint order.

Core's bug was that this final malformed state passed placement validation: Port.doInitialPcbPortRender produced no PCB port, and routing was allowed to continue. This change checks the completed Circuit JSON at PcbPlacementDesignRuleChecks, reports the exact source ports, and prevents autorouting. It deliberately does not re-enable implicit named-pad numbering, which would regress mechanical footprint hints.

The importer generator should separately merge caller labels with required imported physical aliases while both mappings are still available.

Testing

• bun test focused/high-risk suite: 11 passed, 0 failed
• bunx tsc --noEmit
• bunx biome format .
• bun run build
• bun run smoke-test:dist
• bunx @tscircuit/dependency-check

Supersedes the Core-generated-Circuit-JSON portion of tscircuit/checks#216.

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Project	Deployment	Actions	Updated (UTC)
tscircuit-core-benchmarks	Ready	Preview	Aug 20, 2026 11:52pm