Introduce basic Verilator support

.github/workflows/c.yml

@@ -28,6 +28,7 @@ jobs:
       id: set-up-homebrew
       uses: Homebrew/actions/setup-homebrew@master
     - run: brew install bison expect icarus-verilog
+    - run: brew install verilator
     - if: runner.os == 'macOS'
       run: echo "$(brew --prefix)/opt/bison/bin" >> $GITHUB_PATH
     - if: matrix.SDL != 0

CMakeLists.txt

@@ -9,7 +9,8 @@ set(CMAKE_C_STANDARD_REQUIRED TRUE)
 
 list(APPEND CMAKE_MODULE_PATH "${CMAKE_SOURCE_DIR}/cmake")
 
-option(BUILD_EXAMPLES OFF "build examples from ex/")
+option(BUILD_EXAMPLES "build examples from ex/" OFF)
+option(VERILATOR "build the Verilator-based simulator" ON)
 
 # The TENYR language is self-hosted: tas, tld, and tsim are built by this
 # project into ${CMAKE_BINARY_DIR}/src. CMake enables the TENYR language
@@ -27,6 +28,7 @@ if(BUILD_EXAMPLES OR TESTING)
             COMMAND ${CMAKE_COMMAND} -S "${CMAKE_SOURCE_DIR}" -B "${_boot_dir}"
                     -DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}
                     -DJIT=${JIT} -DSDL=${SDL} -DICARUS=${ICARUS}
+                    -DVERILATOR=${VERILATOR}
                     -DBUILD_EXAMPLES=OFF -DTESTING=OFF
             RESULT_VARIABLE _boot_cfg_res)
         if(NOT _boot_cfg_res EQUAL 0)
@@ -78,5 +80,6 @@ configure_file(src/tenyr_config.h.in tenyr_config.h)
 
 add_subdirectory(lib)
 add_subdirectory(hw/icarus)
+add_subdirectory(hw/verilator)
 add_subdirectory(hw/vpi)
 add_subdirectory(src)

Changelog.md

@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ## [Unreleased]
 ### Added
 - Make SDL, JIT, and ICARUS selectable at build time (#97, #108)
+- Verilator-based simulator (`vsim`) (#48)
 
 ### Changed
 - Adopt CMake as the build system (#97, #98)

README.md

@@ -21,6 +21,7 @@ development board.
   * [assembler (tas)](https://github.com/kulp/tenyr/wiki/Assembler)
   * [linker (tld)](https://github.com/kulp/tenyr/wiki/Linker)
   * [simulator (tsim)](https://github.com/kulp/tenyr/wiki/Simulator)
+  * [Verilator simulator (vsim)](https://github.com/kulp/tenyr/tree/develop/hw/verilator) – runs tenyr code through the Verilog implementation, with serial text output and `-v` verbosity support
 * a [standard library](https://github.com/kulp/tenyr/tree/develop/lib) of tenyr code
 * some [example software](https://github.com/kulp/tenyr/tree/develop/ex), including :
   * [Conway's Game of Life](https://en.wikipedia.org/wiki/Conway%27s_Game_of_Life) ([tenyr source code](https://github.com/kulp/tenyr/blob/develop/ex/bm_conway.tas))

ex/CMakeLists.txt

@@ -103,5 +103,14 @@ foreach(demo ${demos})
             COST 0.5
     )
 
+    if(VERILATOR)
+        check_std_outputs(
+            NAME    ${demo}_demo_verilog
+            COMMAND ${VSIM}
+            INPUT   ${demo_executable}
+            PROPERTIES TIMEOUT 60
+        )
+    endif()
+
 endforeach()
 endif()

hw/verilator/.gitignore

@@ -0,0 +1,13 @@
+*.tree
+*.dot
+Vtop*.cpp
+Vtop*.h
+Vtop*.mk
+Vtop*.vpp
+Vtop
+Vtop.xml
+Vtop*.a
+Vtop__*.*
+Vtop_061_order_edges.txt
+vsim
+logs/

hw/verilator/CMakeLists.txt

@@ -0,0 +1,67 @@
+# Verilator-based simulator target.
+if(NOT VERILATOR)
+    return()
+endif()
+find_program(VERILATOR_BIN verilator)
+if(NOT VERILATOR_BIN)
+    message(FATAL_ERROR "Verilator not found. Install it or set VERILATOR=OFF")
+endif()
+
+# Generate C++ model from Verilog sources
+set(VFILES
+    ${CMAKE_SOURCE_DIR}/hw/verilog/top.v
+    ${CMAKE_SOURCE_DIR}/hw/verilog/sim/simclocks.v
+    ${CMAKE_SOURCE_DIR}/hw/verilog/tenyr.v
+    ${CMAKE_SOURCE_DIR}/hw/verilog/ram.v
+    ${CMAKE_SOURCE_DIR}/hw/verilog/seg7.v
+    ${CMAKE_CURRENT_SOURCE_DIR}/simserial.v
+    ${CMAKE_SOURCE_DIR}/hw/verilog/hex2segments.v
+    ${CMAKE_SOURCE_DIR}/hw/verilog/gpio.v
+    ${CMAKE_SOURCE_DIR}/3rdparty/wb_intercon/rtl/verilog/wb_mux.v
+    ${CMAKE_CURRENT_SOURCE_DIR}/sim_main.cpp
+)
+
+set(VFLAGS
+    -Wall -Wno-fatal -Wno-style
+    -I${CMAKE_SOURCE_DIR}/hw/verilog
+    --cc --trace
+    -DSIMCLK=tenyr_mainclock
+    -DSERIAL
+    --Mdir ${CMAKE_CURRENT_BINARY_DIR}
+    --exe
+    --vpi --public-flat-rw
+    -CFLAGS "-I${CMAKE_SOURCE_DIR}/src -I${CMAKE_BINARY_DIR}/src -I${CMAKE_SOURCE_DIR}/src/os/default"
+    -LDFLAGS "-L${CMAKE_CURRENT_BINARY_DIR} -ldisasm -L${CMAKE_BINARY_DIR}/src -lcommon -lm"
+)
+
+# macOS: C++ standard library include path
+if(APPLE)
+    execute_process(
+        COMMAND xcrun --show-sdk-path
+        OUTPUT_VARIABLE SDK_PATH
+        OUTPUT_STRIP_TRAILING_WHITESPACE
+    )
+    list(APPEND VFLAGS -CFLAGS "-isysroot${SDK_PATH} -I${SDK_PATH}/usr/include/c++/v1")
+endif()
+
+
+add_custom_command(
+    OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/vsim
+    COMMAND ${VERILATOR_BIN} ${VFLAGS} ${VFILES}
+    COMMAND make -C ${CMAKE_CURRENT_BINARY_DIR} -f ${CMAKE_CURRENT_BINARY_DIR}/Vtop.mk Vtop
+    COMMAND ${CMAKE_COMMAND} -E rename Vtop vsim
+    DEPENDS ${VFILES} common disasm
+    WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
+    COMMENT "Building Verilator simulator (vsim)"
+)
+
+add_custom_target(vsim ALL
+    DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/vsim
+)
+
+# Convenience: run the simulator
+add_custom_target(vsim-run
+    COMMAND ${CMAKE_CURRENT_BINARY_DIR}/vsim ${vsim_args}
+    DEPENDS vsim
+    WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
+)