Electrical engineering.
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University of British Columbia
- Vancouver, Canada
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18:59
(UTC -07:00) - https://warricklo.net
- https://git.warricklo.net
Highlights
- Pro
Pinned Loading
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sky130-opamp
sky130-opamp PublicMirror of https://git.warricklo.net/opamp. Two-stage operational amplifier design with the Skywater 130 nm PDK.
Tcl
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ubc-asic/montreal
ubc-asic/montreal PublicRV32E core for TinyTapeout, codename "Montréal".
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risc-processor
risc-processor PublicFive-cycle Turing-complete RISC processor for the DE1-SoC. Mirror of https://git.warricklo.net/risc-processor and https://github.com/kryptoish/Simple-RISC-Processor.
SystemVerilog
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kryptoish/Simple-RISC-Processor
kryptoish/Simple-RISC-Processor PublicThis is the source code for our Turing-complete RISC Processor | Ranked 3rd place out of 300 students | 2024W
SystemVerilog 2
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