feat(converter): keep the LTspice drawing in the emitted .plecs (#94) - #96
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feat(converter): keep the LTspice drawing in the emitted .plecs (#94)#96tinix84 wants to merge 1 commit into
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…direction, wire Points The .plecs emitted from an .asc was electrically right but misleading to look at: PLECS Position is the body centre while LTspice SYMBOL x y is the symbol origin; the Direction table was 180 degrees off (PLECS names the side terminal 1 faces, verified over hundreds of connections in the 4.7 demos, and Flipped swaps the ends); and the WIRE segments were dropped, so every net became a star from the alphabetically first pin. The Circuit Model Net now carries its wire segments and pin attach points (optional, empty for formats without layout). The LTspice parser scales 16 -> 10 onto the PLECS grid, centres each body between its pins, derives the direction from pin 1, and never emits Flipped. The PLECS emitter turns the segment graph into the Connection/Branch tree: stubs pruned, only corners and attach points as Points, a Branch at every junction or pass-through pin; nets without geometry emit byte-for-byte what they did before. Live: rc_step re-run on LTspice 26.0.1 vs PLECS 4.7.7, PASS at 1.06e-7, Evidence Bundle 2026-08-29T210930Z. Closes #94 Refs: #91, #95 Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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Closes #94. Follow-up recorded as #95 (auto-layout for sources without geometry).
Why
The
.plecsemitted from an.ascsimulated correctly but the schematic was misleading: bodies displaced from their wires, wires through bodies, every multi-pin net a star. Three causes, all fixed here:Positionwas the LTspice symbol origin; PLECSPositionis the body centre.Directionwas 180° off. Mining PLECS 4.7demos/*.plecs+components.plecs(hundreds of connections):Directionnames the side terminal 1 faces,Flipped onswaps the ends.R0(pin 1 on top) isup, notdown;M*becomes the opposite direction, neverFlipped on.WIREgeometry was discarded; the emitter wrote point-lessConnections branching offpins[0].What changed
Netgains optionalsegments/pin_points(Circuit Model coordinates = PLECS convention). Empty for every other parser; those paths emit byte-for-byte what they did (regression-locked onsimple_buck_prb.plecs).flipped=False.Connection/Branchtree; dangling stubs pruned; only corners + attach points asPoints;Branchat junctions and pass-through pins; unreachable pins fall back to the old point-less branch.Evidence
ruffclean; full suite 269 passed with PLECS up.-m converter_acceptance -k rc_stepon LTspice 26.0.1 vs PLECS 4.7.7 — PASS, max |Δ|/step = 1.06e-7. Bundletests/evidence/rc_step/step/2026-08-29T210930Z-ltspice-import/(compare thePoints/Positionlines with the 12:29Z bundle for before/after).Not touched
emitters/ltspice.py::_orientationis wrong under the same semantics (up → R270) — that is the.ascemitter defect on #20.🤖 Generated with Claude Code