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Merged
thePunderWoman merged 1 commit into from
Aug 23, 2026
Merged

task: board is fully routed #24

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9 changes: 6 additions & 3 deletions PCB/GPIO_table.md
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Expand Up @@ -93,8 +93,10 @@ board now, so the pin roles map over conceptually).
## Digital Inputs / Outputs
| Function | Pin | Notes |
|---|---|---|
| Vol up | 9 (GPIO16) | Internal pull-up, active low |
| Vol down | 10 (GPIO17) | Internal pull-up, active low |
| Vol up | 33 (GPIO40) | Internal pull-up, active low |
| Vol down | 32 (GPIO39) | Internal pull-up, active low |
| Trigger up (mirrored VOL pair, opposite-handed variant) | 9 (GPIO16) | Internal pull-up, active low |
| Trigger down (mirrored VOL pair, opposite-handed variant) | 10 (GPIO17) | Internal pull-up, active low |
| Digital trigger (bumper) | 11 (GPIO18) | Internal pull-up, active low |
| Thumbstick click (KEY) | 23 (GPIO21) | Internal pull-up, active low |
| Macro button 1-6 | 24, 25, 28, 29, 30, 31 (GPIO47, 48, 35, 36, 37, 38) | Internal pull-up, active low — direct-wired, no scan matrix |
Expand Down Expand Up @@ -212,6 +214,7 @@ exposed GPIO/ADC path with this sense pin.
---

## Spare GPIO
Pins 32-35 (GPIO39-42, default JTAG) — clean, no caveats.
Pins 34-35 (GPIO41-42, default JTAG) — clean, no caveats. Pins 32/33 from
the same JTAG group are now used by BTN_VOL_DN/BTN_VOL_UP.
Pins 15, 16, 26 (GPIO3/46/45) — usable, but strapping pins, best for a
static/non-boot-critical signal.
11 changes: 7 additions & 4 deletions PCB/README.md
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Expand Up @@ -51,7 +51,7 @@ files are organized.
| 22 (GPIO18) | XBee ON_SLEEP status input |

Usable with care (strapping pins, sampled at boot): 15 (GPIO3), 16 (GPIO46), 26 (GPIO45).
Clean spares (default JTAG): 32-35 (GPIO39-42).
Clean spares (default JTAG): 34-35 (GPIO41-42). 32/33 from the same group are used by BTN_VOL_DN/BTN_VOL_UP.

The module integrates the WiFi/BT radio, antenna, flash, and crystal
internally — no external wireless component, no bit-banged interface
Expand Down Expand Up @@ -84,8 +84,10 @@ consuming GPIO, unlike the bare-RP2350A design this replaced.
### Digital Inputs / Outputs
| Function | Pin | Notes |
|---|---|---|
| Vol up | 9 | Active low, internal pull-up |
| Vol down | 10 | Active low, internal pull-up |
| Vol up | 33 | Active low, internal pull-up |
| Vol down | 32 | Active low, internal pull-up |
| Trigger up (mirrored VOL pair, opposite-handed variant) | 9 | Active low, internal pull-up |
| Trigger down (mirrored VOL pair, opposite-handed variant) | 10 | Active low, internal pull-up |
| Digital trigger (bumper) | 11 | Active low, internal pull-up |
| Thumbstick click (KEY) | 23 | Active low, internal pull-up |
| Macro buttons 1-6 | 24, 25, 28, 29, 30, 31 | Active low, internal pull-up — direct-wired, no scan matrix |
Expand All @@ -102,7 +104,8 @@ give isn't worth the added complexity, unlike the bare-RP2350A design
(only 1 spare pin) this replaced.

### Spare GPIO
Pins 32-35 (default JTAG, clean) and 15/16/26 (strapping, usable with care).
Pins 34-35 (default JTAG, clean) and 15/16/26 (strapping, usable with care).
32/33 from the same JTAG group are used by BTN_VOL_DN/BTN_VOL_UP.

---

Expand Down
8 changes: 4 additions & 4 deletions PCB/mcu_core.kicad_sch
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Expand Up @@ -1993,7 +1993,7 @@
)
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)
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Expand All @@ -2004,7 +2004,7 @@
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(uuid "2cae71ff-5f43-4afa-b53d-1d801de4ec24")
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Expand All @@ -2015,7 +2015,7 @@
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Expand All @@ -2026,7 +2026,7 @@
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Expand Down
222 changes: 0 additions & 222 deletions PCB/oled.kicad_sch
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Expand Up @@ -587,52 +587,6 @@
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Expand All @@ -655,28 +609,6 @@
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Expand Down Expand Up @@ -920,158 +852,4 @@
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23 changes: 23 additions & 0 deletions PCB/snips_controller.kicad_dru
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Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
(version 1)

(rule "Alps SKRTLAE010 locating-peg clearance"
(constraint hole_clearance (min 0.08mm))
(condition "(A.Reference == 'SW_PWR1' || A.Reference == 'SW_VOL_UP1' || A.Reference == 'SW_VOL_DN1' || A.Reference == 'SW_THR_UP1' || A.Reference == 'SW_THR_DN1' || A.Reference == 'SW_TRIG_DIG1') && A.Reference == B.Reference")
)

(rule "XBee3 THT courtyard exception"
(constraint courtyard_clearance (min -1mm))
(condition "A.Reference == 'U_XBEE1' || B.Reference == 'U_XBEE1'")
)

(rule "BQ25185 thermal-pad via clearance"
(constraint clearance (min 0mm))
(constraint hole_clearance (min 0mm))
(condition "A.Reference == 'U_CHG1' && A.Reference == B.Reference")
)

(rule "BQ25185 thermal-pad via geometry"
(constraint hole_size (min 0.15mm))
(constraint annular_width (min 0.04mm))
(condition "A.Reference == 'U_CHG1'")
)
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