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1. tastynoob.github.io tastynoob.github.io Public

   个人博客网站

   HTML

2. ritter-soc ritter-soc Public

   a 4-pipeline riscv soc ( included core, periph), based with rv32im ,designed by verilog

   Verilog 24 5

3. aura-core aura-core Public

   "aura" my super-scalar O3 cpu core

   SystemVerilog 26

4. Agent-Flow-Language Agent-Flow-Language Public

   TypeScript 8