inference engine for rdna3. codex slop.

.github/workflows/radeon-forge.yml

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+name: Radeon Forge
+
+on:
+  push:
+    branches: [radeon-forge]
+    paths:
+      - "extra/radeon_forge/**"
+      - "test/test_radeon_forge*.py"
+      - ".github/workflows/radeon-forge.yml"
+  pull_request:
+    paths:
+      - "extra/radeon_forge/**"
+      - "test/test_radeon_forge*.py"
+
+permissions:
+  contents: read
+
+jobs:
+  forge:
+    runs-on: ubuntu-latest
+    timeout-minutes: 15
+    steps:
+      - uses: actions/checkout@v4
+      - uses: actions/setup-python@v5
+        with:
+          python-version: "3.12"
+      - name: Compile Radeon Forge
+        run: python -m compileall -q extra/radeon_forge test/test_radeon_forge*.py
+      - name: Run isolated Forge tests
+        run: >-
+          python -m unittest -v
+          test.test_radeon_forge
+          test.test_radeon_forge_recipe
+          test.test_radeon_forge_runtime
+          test.test_radeon_forge_hooks
+          test.test_radeon_forge_autotune
+          test.test_radeon_forge_kv
+          test.test_radeon_forge_tool_stream
+          test.test_radeon_forge_openai

extra/radeon_forge/KERNEL_CORPUS.md

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+# Kernel and optimization corpus
+
+This file records the provenance and intended use of initial Radeon Forge implementation families. Inclusion does not imply that a kernel is correct or fast on the W7900. Every candidate must still pass target compilation, resource, numerical, benchmark, and held-out gates.
+
+## Native RDNA3 / gfx1100 seed
+
+### `extra/gemm/amd_asm_matmul.py`
+
+Status: first hardware family.
+
+Properties:
+
+- direct RDNA3 instruction construction through tinygrad's AMD DSL;
+- explicitly targets gfx1100;
+- 128x128 float32 GEMM tile;
+- 128-thread workgroup;
+- VOPD-aware accumulator and operand register placement;
+- LDS staging and double-buffer-style global prefetch;
+- reference check against tinygrad matmul already exists.
+
+Initial tuning/synthesis dimensions:
+
+- FMAC pair order and instruction scheduling;
+- prefetch placement and distance;
+- `s_clause` grouping;
+- waitcnt placement;
+- LDS swizzle and padding;
+- occupancy limiter used by the harness;
+- matrix-shape specialization.
+
+Unsafe dimensions are not exposed as blind scalar knobs. Structural variants must regenerate a complete program and pass the reference oracle.
+
+## Llama fused-kernel patterns
+
+Most current files under `extra/llama_kernels` compile with `HIPCCCompiler("gfx950", ...)`. They are therefore architectural patterns, not accepted gfx1100 candidates.
+
+### Fused RMSNorm / multiply / FP8 quantization
+
+Source:
+
+- `extra/llama_kernels/fused_rmsnorm_mul_quantize_fp8/`
+
+Useful ideas:
+
+- remove intermediate HBM materializations;
+- one workgroup per row with grid-stride row processing;
+- vectorized BF16 loads;
+- fused normalization, weighting, quantization, saved backward state, and amax;
+- compile-time workgroup and grid parameters.
+
+Candidate structural variants:
+
+- per-workgroup amax followed by a second reduction;
+- scalar global atomic amax;
+- workgroup/thread-count choices valid for hidden dimension;
+- residual-add fusion;
+- direct C/HIP versus UOp representation.
+
+Required before use on W7900:
+
+- successful gfx1100 compilation;
+- confirmation that the relevant dtype/intrinsics are supported and performant;
+- numerical validation against tinygrad;
+- resource metadata and no-spill gate;
+- end-to-end relevance to the selected inference model.
+
+### Fused cross entropy
+
+Provenance pattern: upstream tinygrad PR #16263 replaced handwritten C with a portable UOp version while preserving fusion and memory savings. The PR notes that the then-current BEAM-tuned UOp forward remained much slower than handwritten C, while end-to-end training differed far less.
+
+Use in Forge:
+
+- compare direct target-specific code and portable UOp families;
+- optimize the end-to-end objective, not an isolated kernel ratio;
+- retain the portable family as fallback.
+
+### Atomic amax
+
+Provenance pattern: upstream tinygrad PR #17063 replaces a two-stage amax reduction with atomics to remove repeated reduction-kernel launches.
+
+Use in Forge:
+
+- structural alternative, not assumed winner;
+- compare under representative tensor size and contention;
+- reject if numerical or end-to-end behavior regresses.
+
+## Compiler-resource oracle
+
+Provenance pattern: upstream tinygrad PR #3641 demonstrates extraction of COMGR executable metadata including VGPR/SGPR counts, LDS, scratch, occupancy, and spill counts.
+
+Forge uses these as hard or diagnostic signals:
+
+- spills may be forbidden by workload contract;
+- excess VGPR/LDS use can reject a candidate before expensive trials;
+- a kernel that loses occupancy is not automatically rejected, but the trade-off is measured and retained in evidence.
+
+## Corpus policy
+
+1. Record source and target architecture.
+2. Distinguish a reusable idea from code verified on gfx1100.
+3. Preserve rejected variants and reasons.
+4. Never import a claimed benchmark without reproducing it on the assigned W7900.
+5. Prefer end-to-end inference improvement over isolated-kernel speedup.
+6. Keep tinygrad/UOp implementations as reference and fallback even when direct generated code wins.

extra/radeon_forge/README.md

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+# Radeon Forge
+
+Radeon Forge is an oracle-guided, fully local performance-engineering agent for private AI workloads on AMD Radeon / ROCm.
+
+The durable project is the workload intent, invariants, correctness oracle, benchmark protocol, hardware evidence, and experiment history. Generated kernel implementations are disposable candidates: Forge may regenerate or replace them, but it may not deploy one that fails a hard oracle.
+
+## Track 2 scenario
+
+A user asks Forge to optimize a locally deployed private agent under explicit constraints, for example:
+
+```text
+Minimize P95 end-to-end task latency on a Radeon PRO W7900.
+Do not use remote model APIs. Preserve task success within 1% of baseline,
+require valid tool calls, forbid kernel spills, and stay below the VRAM limit.
+```
+
+Forge decomposes the request, invokes compiler/test/benchmark tools, remembers prior experiments, requests permission for consequential actions, and deploys or rolls back a measured configuration.
+
+## Optimization loop
+
+```text
+contract
+  -> baseline
+  -> choose kernel/runtime family
+  -> compile for gfx1100
+  -> reject invalid resource usage
+  -> correctness oracle
+  -> short hardware trials
+  -> successive halving
+  -> held-out validation
+  -> approval
+  -> deploy or revert
+```
+
+The agent may propose structural rewrites. The deterministic tuner evaluates parameters within each implementation family. Neither may override a failed correctness, quality, stability, privacy, or resource gate.
+
+## Metrics
+
+Primary submission metric:
+
+- P95 end-to-end latency on a frozen private-agent task suite.
+
+Supporting metrics:
+
+- time to first token;
+- inter-token latency and decode throughput;
+- kernel/subgraph median and P95 latency;
+- task success and tool-call validity;
+- numerical maximum absolute and relative error;
+- VGPR, SGPR, LDS, scratch, spills, occupancy, and peak VRAM;
+- crash rate and repeated-run stability;
+- external network calls.
+
+Speed is optimized subject to correctness and quality constraints. A faster invalid candidate cannot win.
+
+## Tinygrad's role
+
+Tinygrad is used as:
+
+1. the trusted reference implementation and end-to-end workload;
+2. the baseline and fallback runtime;
+3. a corpus of AMD kernel implementations and optimization patterns;
+4. the low-level AMD execution path for selected generated candidates.
+
+Radeon Forge is kept under `extra/radeon_forge` instead of being embedded deeply into tinygrad's compiler. This makes the oracle and tuning loop independently auditable and lets generated HIP/UOp/AMD-DSL implementations remain replaceable.
+
+## Current implementation
+
+Implemented:
+
+- workload, objective, correctness, and resource contracts;
+- hard feasibility gates;
+- append-only JSONL experiment ledger;
+- successive-halving tuner;
+- AMD metadata parsing for registers, LDS, scratch, occupancy, and spills;
+- target-specific HIP compilation backend;
+- executable JSON benchmark protocol;
+- kernel-family search-space representation;
+- native gfx1100 assembly-GEMM family with valid alternate FMAC schedules and occupancy limits;
+- gfx1100 hardware workload adapter with a tinygrad numerical oracle;
+- fused RMSNorm/multiply/FP8 pattern family, gated as unverified on gfx1100;
+- deterministic local retrieval with file-and-line citations;
+- loopback-only OpenAI-compatible planner client with no remote fallback;
+- deny-by-default, scoped, expiring permission grants;
+- multi-turn proposal, revision, approval, authorization, completion, and failure state machine;
+- unit tests for metadata, hard gates, command protocol, permissions, local endpoint restrictions, retrieval, and multi-turn approval.
+
+Not yet claimed or implemented:
+
+- no W7900 performance result has been recorded;
+- the gfx950 Llama kernels are pattern references until individually compiled and validated on gfx1100;
+- no generated candidate is approved for deployment;
+- no local planner model/runtime has yet been selected and benchmarked on the W7900;
+- the interactive terminal/web surface is still pending;
+- the frozen end-to-end private-agent task suite and held-out evaluation are still pending.
+
+## First gfx1100 hardware gate
+
+Review the candidate plan without running hardware:
+
+```bash
+python3 -m extra.radeon_forge.cli --root . --family rdna3-asm-matmul --n 1024 --dry-run
+```
+
+After reviewing the printed plan, explicitly approve the local benchmark:
+
+```bash
+python3 -m extra.radeon_forge.cli \
+  --root . \
+  --family rdna3-asm-matmul \
+  --n 1024 \
+  --budgets 3,10,30 \
+  --approve-benchmark
+```
+
+This family validates the Forge search, permission, oracle, and evidence path. It is not the final Track 2 submission metric.
+
+## Benchmark executable protocol
+
+A workload harness receives:
+
+- `RADEON_FORGE_CANDIDATE_JSON`
+- `RADEON_FORGE_BUDGET`
+
+Its final non-empty stdout line must be a JSON object such as:
+
+```json
+{
+  "compile_ok": true,
+  "stable": true,
+  "samples_us": [8.4, 8.2, 8.3],
+  "correctness": {
+    "passed": true,
+    "max_abs_error": 0.0002,
+    "max_rel_error": 0.0008,
+    "checked_values": 65536
+  },
+  "resources": {
+    "vgprs": 72,
+    "sgprs": 32,
+    "lds_bytes": 8192,
+    "scratch_bytes": 0,
+    "spilled_vgprs": 0,
+    "spilled_sgprs": 0
+  },
+  "evidence": {
+    "target": "gfx1100",
+    "reference": "tinygrad"
+  }
+}
+```
+
+## Development validation
+
+```bash
+python3 -m unittest test.test_radeon_forge -v
+python3 -m compileall -q extra/radeon_forge
+```
+
+Hardware evidence must be generated on the assigned Radeon Cloud W7900 before any speed claim is made.

extra/radeon_forge/__init__.py

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+"""Radeon Forge: oracle-guided synthesis and autotuning for AMD inference workloads."""
+
+from .contracts import Candidate, Objective, TrialResult, WorkloadContract
+from .ledger import ExperimentLedger
+from .tuner import successive_halving
+
+__all__ = ["Candidate", "ExperimentLedger", "Objective", "TrialResult", "WorkloadContract", "successive_halving"]