LATX, opt: complete SHBR high-bit dataflow - #416
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Replace TB-local union tracking with explicit SHBR read, definition, and dependency sets, then solve XMM high-bit liveness across the TU CFG. Add conservative implicit-state barriers, opcode audits, metrics, and differential fixtures for SSE, AVX, state-save, and control-flow cases. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
XRSTOR preserves existing XMM values when its mask excludes XMM state. Model its implicit read and write semantics from EDX:EAX so an earlier scalar high-lane definition remains live, and add regression coverage. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Generate high32 and high64 rules for remaining legacy SIMD and AVX families, including YMM, FMA, and compare operations. Use decoded operand access for multi-source, cross-lane, and implicit dependencies while keeping unknown instructions conservative. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Preserve operand access metadata in Capstone DIET builds and reject HBR builds that cannot provide it. Separate direct reads from result dependencies and cover multi-source, implicit, and cross-lane instructions so no source is treated as dead. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Use SHBR at MOVSS, ROUNDSS, ROUNDSD, RCPSS, RSQRTSS, and scalar conversion consumers. When tracked high bits are dead, write the scalar result directly and skip the merge while preserving live-lane paths. Update generation metrics and add live and dead round tests. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Recognize XOR-style self-zeroing operations and zero-preserving source forms in SHBR dataflow. This removes high-lane dependencies only when the instruction semantics prove the produced bits are zero. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Do not treat absent predecessors, memory, or matching source states as proof that an instruction produces zero high bits. Preserve dependencies unless the operation is explicitly proven to be self-zeroing or zero-preserving, and extend adversarial-chain coverage. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Enumerate every SHBR high32 and high64 consumer and record the expected LSX or LASX instruction removal. Fail the audit when a gate is added, removed, renamed, or changes its expected benefit without a matching metrics update. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Packed floating-point subtraction and division do not preserve a general zero-state proof. Signed zero, rounding, NaNs, and memory operands can produce nonzero bit patterns. Keep their source dependencies live and add targeted regression checks. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
The separated-data summary is valid only for TBs in the current TU list. Treat SHBR and GHBR values as live when control flow leaves that list, instead of consulting stale metadata from an external successor. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Packed floating-point comparisons can produce all-one lanes and rely on the predicate and NaN behavior even when their inputs look zero. Remove the invalid zero-state inference and retain its dependencies. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Unpack, shuffle, and broadcast can move low source lanes into the tracked high32 or high64 region. Record those dependencies instead of inferring a zero high state. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Match the disabled SHBR_ON_64 macro to the enabled form's arguments. This keeps call sites valid when SHBR optimization is compiled out and lets the static audit exercise both configurations. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Packed floating-point arithmetic may consume every input lane for MXCSR exception behavior even when the numeric destination lanes are dead. Model them as direct reads so SHBR cannot remove their producers. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
POPAW writes only the low 16 bits of its destination registers and preserves their upper bits. Stop treating the upper bits as definitions so GHBR keeps the incoming values live. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
DIV and IDIV read the full RDX:RAX dividend before writing quotient and remainder. Model RDX as both input and output so GHBR cannot discard its preceding high-bit definition. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Translation can update SHBR counters from multiple threads. Use atomic updates and emit the aggregate once at process exit to avoid data races, torn totals, and duplicate per-thread reports. Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
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Summary / 变更说明
dependency sets solved across the TU control-flow graph.
remove scalar high-lane merges only when their values are proven dead.
zero-state inference, external TU successors, and hidden GHBR operands.
regression fixtures. No documentation files are included.
Validation / 验证
masterata16a46b3b8.matching DCO sign-offs.
python3 scripts/generate_latx_hbr_semantics.py --checkPYTHONPATH=scripts python3 -m unittest scripts.test_latx_hbr_audit scripts.test_latx_hbr_metricspython3 scripts/latx_hbr_audit.pythe translator; AOT first-generation and warm-cache outputs are identical.
ninja -C build64-avx latx-x86_64lat-x86_64 1.6.5-354-g3766fc8c24bce0ae6a5400912c96b9f97ac76da3ca4fb5ee99330abe2f805546281ced1235Checklist / 检查项
CONTRIBUTING.md. / 我已阅读CONTRIBUTING.md。git commit -s). /每个提交都包含 DCO 签署（
git commit -s）。are not applicable. /
我已提供相关构建或测试结果，或说明了不适用的原因。