[SYCL] Implement sycl_ext_intel_maximum_registers

[sarnex]

This PR implements sycl_ext_intel_maximum_registers which allows per-kernel GRF size specification, communicated to the graphics driver using the SPV_INTEL_maximum_registers SPIR-V extension.

The SYCL extension defines two new properties, maximum_registers<N> and maximum_registers_automatic.

There is a similar extension sycl_ext_intel_grf_size, however the mechanism by which that extension communicates the user specification to the graphics driver is not supported in some use cases, does not use a first-class SPIR-V extension.

The new extension covers all use cases, but it requires a graphics driver supporting SPV_INTEL_maximum_registers and using it will error on drivers that do not support the new extension, so we introduced a new extension to not break existing users of sycl_ext_intel_grf_size and allow users to opt-in to the requirement to have a driver supporting this extension.

The property ends up after CFE codegen as the IR attribute sycl-maximum-registers which CompileTimePropertiesPass processes by adding the MaximumRegisters metadata to the kernel, which the SPIR-V translator is looking for.

SPIR-V translator support was implemented in KhronosGroup/SPIRV-LLVM-Translator@ca3769b.

There is no public driver implementing SPV_INTEL_maximum_registers yet, so I wrote a compile-time test to verify the property mutual exclusivity/supported register sizes, and a currently-build-only E2E test to make sure all cases at least compile. Once a driver is available and we are using it in CI, the test will XPASS so we can enable it.

I manually tested this on Linux BMG using a prototype graphics driver and everything worked as expected. I will test on Windows when a final implementation is merged, the prototype didn't support Windows.

[sarnex]

This will not cause an issue for older graphics drivers. The only way to generate a SPIR-V module that actually uses this extension is to use the new SYCL property implemented in this PR.

[YuriPlyakhin]

llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp and sycl/doc/extensions/experimental/sycl_ext_intel_maximum_registers.asciidoc LGTM

[mdtoguchi]

Should an equivalent entry be done for the new model in https://github.com/sarnex/llvm/blob/457e4b4ef0ed66fd9c4ceb5b47a55860828c2459/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp#L954

[sarnex]

ah good catch, i incorrectly assumed the driver one was used for both. fixed in b403905, thanks

[sarnex]

Ping on this one @mdtoguchi @intel/llvm-reviewers-runtime, we are trying to get this into the 2026.2 release so we need to cherry pick it soon. Thank you!