gHashTag · gHashTag · Jul 5, 2026 · Jul 5, 2026 · Jul 5, 2026
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
@@ -0,0 +1,79 @@
+# Contributing to Tri-Net
+
+> phi^2 + phi^-2 = 3
+
+Welcome. This file exists so a human contributor can go from `git clone` to a
+green PR in about 15 minutes. It intentionally does **not** cover the AI-agent
+onboarding protocol — for that see [`docs/AGENT_ONBOARDING.md`](docs/AGENT_ONBOARDING.md).
+
+Addresses [W7 finding #8](docs/W7_WEAK_POINTS_STRUCTURAL.md#находка-8) (bus factor).
+
+## 60-second quickstart
+
+```bash
+git clone https://github.com/gHashTag/tri-net.git
+cd tri-net
+cargo build --release
+cargo test --release   # expect: 137 passed, 0 failed on main @ 13e4692
+```
+
+If the last line says `137 passed`, your environment is ready. If not, check:
+- Rust toolchain (stable, minimum 1.75; check with `rustc --version`)
+- macOS / Linux (Windows not tested)
+
+## Repository layout
+
+- `src/` — mesh daemon (`trios_meshd`), routing (`routing.rs`), wire codec (`wire.rs`)
+- `specs/*.t27` — T27 spec language sources (single source of truth for wire format)
+- `gen/{rust,c,zig}/` — auto-generated code from T27 specs, byte-identical to spec regeneration
+- `smoke/` — smoke tests (`m2_loopback_smoke.sh`, `m2_loopback_smoke_n_runs.sh`)
+- `docs/` — design docs, wave reports, weak-point audits, plans
+- `tests/` — Rust integration tests
+
+## Making a change
+
+1. **Branch**: never push to `main` directly. Branch names look like `feat/w<N>-<slug>-<YYYY-MM-DD>` or `fix/<slug>-<YYYY-MM-DD>`.
+
+2. **Test locally**: run `cargo test --release` before pushing. It must return `137 passed, 0 failed` (or more, if you added tests). If you touched routing or the mesh daemon, run `N=5 DURATION=10 ./smoke/m2_loopback_smoke_n_runs.sh` — it must return `5/5 PASS`.
+
+3. **Commit style**: conventional-commits (`feat:`, `fix:`, `docs:`, `refactor:`, `test:`). Include `phi^2 + phi^-2 = 3` in the body of substantive commits (project convention, see [`docs/AGENT_ONBOARDING.md`](docs/AGENT_ONBOARDING.md)).
+
+4. **Open a PR**: default to DRAFT (`gh pr create --draft`). Base is usually `main`. Include:
+   - What changed and why (one paragraph)
+   - How you verified (command + expected output)
+   - Cross-references to any related PR / doc / finding
+
+5. **Discipline rules to know**:
+   - **No fabricated metrics**: any pre-hardware number tagged `-sim`. See [`docs/WAVE_REPORT_2026-07-05.md`](docs/WAVE_REPORT_2026-07-05.md).
+   - **Numbers cite command + SHA**: any numeric claim in a doc must cite the exact command AND commit SHA it was measured on.
+   - **No-paste-review**: reviewers approve committed text, not pasted diffs. See PR #43.
+   - **SHA-advance re-review**: an approval binds to a cited SHA; branch advance requires explicit re-review. See PR #45.
+   - **Regression gates test invariants**: a gate tests the property the fix guarantees, not the asymptote the algorithm aspires to. See [`smoke/M2_LOOPBACK_FIX_RESULTS.md`](smoke/M2_LOOPBACK_FIX_RESULTS.md).
+
+## What you cannot do as a non-maintainer
+
+- **Merge PRs**: main is protected; only maintainers merge. This is a small-team policy, not a permanent rule.
+- **Flash hardware**: physical P203 Mini boards live with one person; hardware operations require that person's presence with a JTAG cable. Software / docs / codegen contributions do not touch hardware.
+- **Change token or economic parameters**: those live in the whitepaper (`README.md` §Tokenomics) and change requires governance. Doc improvements welcome; parameter changes do not.
+
+## Where to start
+
+Good first PRs by area:
+
+- **Docs**: fix typos, clarify a `-sim` boundary, add a cross-link between two related docs.
+- **Tests**: add a property-test or fuzz case in `tests/` for an existing invariant.
+- **Codegen**: pick a currently-non-compiling spec in [`docs/W6_CODEGEN_AUDIT_2026-07-05.md`](docs/W6_CODEGEN_AUDIT_2026-07-05.md) and make it compile in one backend. Requires the `t27c` compiler (separate repo, see `docs/AGENT_ONBOARDING.md`).
+- **Smoke**: extend `m2_loopback_smoke.sh` to check additional invariants without breaking determinism (must still pass N=5 back-to-back).
+
+## Questions
+
+- Open a GitHub issue with `question:` prefix.
+- The maintainer reads issues within 24-48 hours in most weeks; if urgent, note it in the issue title.
+
+## Code of conduct
+
+Standard: be direct, be honest, do not fabricate numbers, do not overclaim. If your change reduces a claim in the repo (e.g., "we tested this fewer times than the doc said"), that is welcome. See [`docs/WAVE_REPORT_2026-07-05.md`](docs/WAVE_REPORT_2026-07-05.md) §"Что не переживёт" for the culture on this.
+
+---
+
+phi^2 + phi^-2 = 3
diff --git a/README.md b/README.md
@@ -89,7 +89,7 @@ BitNet-ternary benchmark on returned silicon, publish the raw log.
 | Rust source lines | 4 463 | `find src -name '*.rs' \| xargs wc -l` |
 | AD9361 tune target | LO 5.8 GHz | `radio/README.md` |
 | AD9361 FFT peak (1 MHz tone, digital loopback) | +0.999 MHz | `radio/README.md` |
-| AD9361 SNR over noise floor | 108.6 dB | `radio/README.md` |
+| AD9361 SNR over noise floor | 108.6 dB (digital loopback only, not over-the-air) | `radio/README.md`; see [W7 finding #5](docs/W7_WEAK_POINTS_STRUCTURAL.md#находка-5) and [REGULATORY_STATUS](docs/REGULATORY_STATUS.md) |
 | AD9361 tuning range | 70 MHz … 6 GHz | `radio/README.md` |
 | Sample rate | 30.72 MHz | `radio/README.md` |
 | Capture length | 65 536 samples | `radio/README.md` |

diff --git a/docs/PAPER_DELTA_v0.md b/docs/PAPER_DELTA_v0.md
@@ -102,7 +102,9 @@ Contribution C1 (CI-enforced spec/impl equality) is only as strong as its covera
 
 1. `t27c <backend> specs/<spec>.t27` produces output without emitting the literal `return ()` placeholder (used inside the compiler to mark unsupported constructs) and without emitting any `// unsupported: ...` marker.
 2. The generated file byte-matches the file committed under `gen/<backend>/<spec>.<ext>` (the diff-based enforcement that Contribution C1 rests on).
-3. The parent workspace still passes its host-side sanity gate: `cargo test --all` on tri-net = 141 passed, 0 failed at the same tuple.
+3. The parent workspace still passes its host-side sanity gate: `cargo test --release` on tri-net = 137 passed, 0 failed (measured on main @ `13e4692`, 2026-07-05).
+
+> **Errata 2026-07-05**: earlier drafts of this document listed `141 passed` for the same command. Investigation across seven SHAs in the 2026-06-29→2026-07-05 window showed the real number has always been 137 (135 before PR #32). The 141 figure was an anchor-class error; corrected in three places (this §4.5 gate, §4.5 reproduction, §4.5 checklist). See `docs/W8_WEAK_POINTS_AUDIT.md` A1.
 
 **Drift event.** Any single cell violating (1) or (2) after a merge is a drift event and fails the `spec-drift-guard` CI job, blocking merge. This is the operational definition of "drift" used throughout the paper: **byte-level divergence between spec-driven regeneration and committed artifact.** No semantic equivalence, no behavioural equivalence, no theorem — a byte diff.
 
@@ -307,7 +309,7 @@ At tri-net `bf50ad64`, verified in-CI on [PR #39](https://github.com/gHashTag/tr
 - `t27c gen-c     specs/wire.t27 | diff -u gen/c/wire.c    -` → empty.
 - The same triple holds for the other 67 specs; §4.5.2 lists all 68 rows.
 - `grep -c 'unsupported: ExprCast' gen/{rust,zig,c}/*.{rs,zig,c}` → 0 across all 204 committed files.
-- `cargo test --all` → 141 passed / 0 failed (includes `wire::tests::header_roundtrips` plus the extended per-spec test surface introduced during the 2026-07-04 flip loop).
+- `cargo test --all` → 137 passed / 0 failed (includes `wire::tests::header_roundtrips` plus the extended per-spec test surface introduced during the 2026-07-04 flip loop).
 
 Sample of generated cast forms (extracted from the committed files, not fabricated):
 
@@ -387,4 +389,4 @@ This is exactly what [`.github/workflows/spec-drift-guard.yml`](https://github.c
 5. Rust: `../t27/target/release/t27c gen-rust specs/wire.t27 | diff -u gen/rust/wire.rs -`. Expected: empty diff.
 6. Zig:  `../t27/target/release/t27c gen       specs/wire.t27 | diff -u gen/zig/wire.zig -`. Expected: empty diff.
 7. C:    `../t27/target/release/t27c gen-c     specs/wire.t27 | diff -u gen/c/wire.c    -`. Expected: empty diff.
-8. Optional: `cargo test --all`. Expected: 141 passed / 0 failed.
+8. Optional: `cargo test --all`. Expected: 137 passed / 0 failed.
diff --git a/docs/REGULATORY_STATUS.md b/docs/REGULATORY_STATUS.md
@@ -0,0 +1,57 @@
+# Regulatory status — 5.8 GHz mesh, single source of truth
+
+> phi^2 + phi^-2 = 3
+
+**Purpose**: consolidate everything the project knows about legal ability to run
+5.8 GHz over-the-air (OTA) mesh experiments. Previously scattered across three
+docs; consolidated per W7 finding #6.
+
+**Date of this snapshot**: 2026-07-05, measured on main @ `13e4692`.
+
+**Do not** treat this document as legal advice. It is a status board for
+internal go/no-go decisions. Actual OTA experiments require a licensed operator
+and, in most jurisdictions, written authorization filed with the regulator.
+
+---
+
+## Status table
+
+| Jurisdiction | 5.8 GHz OTA status for mesh | Power ceiling (unlicensed) | Path to licensed test | Next-step date | Source |
+|---|---|---|---|---|---|
+| Thailand (Phuket, primary dev location) | **CLOSED** for mesh use without NBTC license | 100 mW EIRP under Wi-Fi-like rules; mesh routing not covered | Requires NBTC individual radio license; no application filed | n.a. — blocked | [docs/WAVE_REPORT_2026-07-03.md:145](https://github.com/gHashTag/tri-net/blob/main/docs/WAVE_REPORT_2026-07-03.md) |
+| Singapore | Similar to TH — licensed-by-rule 100 mW ceiling for point-to-point | 100 mW | IMDA test license process (~4-8 weeks) | not initiated | [docs/STRENGTHEN.md P8 BVLOS row](https://github.com/gHashTag/tri-net/blob/main/docs/STRENGTHEN.md) |
+| UAE (ADGM / DIFC via Hub71+) | **OPEN** in principle via ADGM / DIFC RegLab sandbox | Case-by-case per sandbox admission | Hub71+ AI Cohort 20 application (deadline 2026-08-02) is prerequisite step | 2026-08-02 (application deadline) | [README.md:169](https://github.com/gHashTag/tri-net/blob/main/README.md); [docs/LOCAL_FLASH.md:413](https://github.com/gHashTag/tri-net/blob/main/docs/LOCAL_FLASH.md) |
+| USA (FCC, hypothetical) | 5.725-5.850 GHz U-NII-3 unlicensed; mesh permitted with 802.11 rules | 1 W conducted / 4 W EIRP with cert | Would require FCC Part 15 subpart E cert for radio module | not on roadmap | n.a. — not the target market |
+| EU (CEPT, hypothetical) | 5.725-5.875 GHz ISM; mesh permitted with SRD rules | 25-500 mW depending on band segment | ETSI EN 300 440 / EN 302 502 conformance | not on roadmap | n.a. — not the target market |
+
+## What can be done RIGHT NOW (no license, no OTA)
+
+1. **Digital loopback**: AD9361 internal TX→RX digital path. Already done, SNR 108.6 dB (`radio/README.md:7-14`). Note: this is **not an over-the-air measurement**, see [W7 finding #5](W7_WEAK_POINTS_STRUCTURAL.md#находка-5).
+
+2. **SMA RF loopback with attenuator**: TX SMA → attenuator → RX SMA, contained inside the lab. No radiation. Listed as "next (still greenfield)" in [`radio/README.md:26-29`](https://github.com/gHashTag/tri-net/blob/main/radio/README.md); the physically-next legal experiment. Planned in [`docs/LOCAL_FLASH.md §9.3`](https://github.com/gHashTag/tri-net/blob/main/docs/LOCAL_FLASH.md).
+
+3. **UDP transport dev** (current): mesh routing logic (`trios_meshd`) runs on loopback UDP without touching the radio front-end. This is what M2 gate v2 tests. Legal everywhere.
+
+## What is BLOCKED until further notice
+
+- **Any 5.8 GHz radiated experiment in Thailand**. No route to legal until NBTC license or Hub71+ ADGM sandbox admission.
+- **Field flight tests with mesh in the air**. Requires both spectrum authorization AND drone flight authorization (separate BVLOS process; see `docs/STRENGTHEN.md` P8 row).
+- **Public claims of "5.8 GHz mesh works"** based on digital loopback numbers. See W7 finding #5.
+
+## Contingency chain
+
+If Hub71+ 2026-08-02 application is **not** admitted:
+- Fallback A: apply to IMDA (Singapore) sandbox — precedent for DePIN radio experiments exists.
+- Fallback B: partnership with an existing licensed operator (defense contractor, university) — no candidate identified as of 2026-07-05.
+- Fallback C: keep radio arm at digital + SMA loopback, ship remaining stack (T27 codegen, FPGA attestation, token protocol) which do not require spectrum.
+
+## Cross-references
+
+- Finding [W7 #6](W7_WEAK_POINTS_STRUCTURAL.md#находка-6) — this file addresses that finding.
+- [`docs/LOCAL_FLASH.md`](LOCAL_FLASH.md) — hardware handling procedures.
+- [`docs/BENCHMARK_VS_MANET_2026-07-04.md`](BENCHMARK_VS_MANET_2026-07-04.md) — regulatory row in the boundary table.
+- [`README.md`](../README.md) — hardware matrix; this document should be linked next to the matrix.
+
+---
+
+phi^2 + phi^-2 = 3
diff --git a/docs/SILICON_SLIP_CONTINGENCY.md b/docs/SILICON_SLIP_CONTINGENCY.md
@@ -0,0 +1,85 @@
+# Silicon slip contingency — three scenarios
+
+> phi^2 + phi^-2 = 3
+
+**Purpose**: address [W7 finding #1](W7_WEAK_POINTS_STRUCTURAL.md#находка-1). The
+project's compute-arm and public roadmap both hang on a single date — TT SKY26b
+Trinity tape-out 2026-12-16 ([`README.md:26,167`](../README.md)). Between
+tape-out and returned silicon there is typically 8-16 weeks. This document
+enumerates three explicit slip scenarios and the arms that continue in each.
+
+**Snapshot**: 2026-07-05, main @ `13e4692`.
+
+**Silicon-anchor score reference**: see [`docs/BENCHMARK_VS_MANET_2026-07-04.md`](BENCHMARK_VS_MANET_2026-07-04.md) §M7. Level 5 = "custom ASIC returned + on-chain verifier". Level 3 = "FPGA bitstream anchor + signed measurement". Level 2 = "TPM/secure-element attestation".
+
+---
+
+## Scenario 1 — Slip 3 months (tape-out 2027-03-16, returned silicon ~2027-07)
+
+**Assumption**: fab schedule slips one quarter (foundry congestion, mask revision, or minor DRC issue).
+
+**Compute arm**: remains at **level 2** (TPM/HSM attestation as interim, per finding #2 mitigation) or **level 3** (FPGA bitstream anchor via Track B / Proof-of-FPGA arm) through 2027-07.
+
+**Transport / Coverage / Sensor arms**: unaffected. Continue to operate software-signed per [`README.md:67-70`](../README.md).
+
+**Token emission**: Era 0 rewards continue for Transport/Coverage/Sensor at software-signed level. Compute-arm rewards paused OR paid at reduced multiplier tied to attestation level. Explicit rule: **no Compute-arm reward > Transport reward until level 4+ attestation available**.
+
+**Public communication**: silicon-anchor score in README updates to `level 3 (FPGA + signed)` with dated note "level 5 target pushed to 2027 Q3". No headline claim revision needed.
+
+**Trigger for scenario 2 escalation**: if by 2027-05-01 no returned silicon confirmed, invoke scenario 2.
+
+---
+
+## Scenario 2 — Slip 6 months (tape-out 2027-06-16, returned silicon ~2027-10)
+
+**Assumption**: major mask revision, or fab schedule + one bug-fix cycle.
+
+**All of scenario 1** plus:
+
+**Compute arm design change**: publish an amended whitepaper section explicitly moving Compute-arm sybil resistance to "level 3 FPGA-bitstream anchor + PUF measurement" as the **operating** baseline, with level 5 as future upgrade. This aligns with the [`M2_M4_FPGA_DECOMPOSED_PLAN.md`](M2_M4_FPGA_DECOMPOSED_PLAN.md) Track B monetization vectors (FPGA-attestation-as-a-Service).
+
+**Economic**: extend Era 0 emission curve or introduce a slower halving in Era 0 to compensate for delayed Compute-arm activation. Requires token governance decision by 2027-04-01.
+
+**Risk to Trinity narrative**: rename to "Trinity FPGA + Trinity ASIC (future)" everywhere in public materials. Do not drop the ASIC track; but reduce marketing weight until returned silicon is on the table.
+
+**Trigger for scenario 3 escalation**: if by 2027-09-01 no returned silicon confirmed, invoke scenario 3.
+
+---
+
+## Scenario 3 — Slip 12+ months (tape-out 2027-12+, returned silicon 2028+ or indefinite)
+
+**Assumption**: fundamental redesign, fab loss, funding constraint on tape-out.
+
+**Options** (must pick one by 2027-09-01):
+
+**3A — pure FPGA network**: promote Proof-of-FPGA (Track B) from parallel arm to primary. Silicon-anchor score at level 3, permanent until further notice. Whitepaper amended. The advantage: real product, real hardware, real sybil resistance. Loss: no longer a "silicon-anchor DePIN", positioning shift required.
+
+**3B — partner with existing PUF vendor**: license Intrinsic ID (Synopsys since 2024) SRAM-PUF IP OR PUFsecurity IP, integrate into an off-the-shelf SoC (RISC-V), skip in-house Trinity ASIC entirely. Silicon-anchor score reaches level 4 via partner-attested chip. Loss: dependence on external IP vendor; economic model needs adjustment for royalty flow.
+
+**3C — kill Compute arm cleanly**: publicly retire Compute-arm from the whitepaper. Continue as three-arm DePIN (Transport/Coverage/Sensor). Loss: half the whitepaper structure gone; refund/burn any pre-committed reserves earmarked for Compute-arm. Preserve project integrity by clean deprecation rather than indefinite promise.
+
+**In all three 3-options**: token supply / halving schedule remains unchanged. What changes is which arm can claim proof-of-work.
+
+---
+
+## What is decided vs deferred
+
+**Decided now** (documented in this file):
+- Slip 3 months → continue on FPGA-anchor without whitepaper change (scenario 1)
+- Slip 6 months → whitepaper amendment moving compute baseline to FPGA (scenario 2)
+- Trigger dates: 2027-05-01 (scenario 2 check), 2027-09-01 (scenario 3 check)
+
+**Deferred** (requires governance / community vote when triggered):
+- Choice between 3A / 3B / 3C
+- Economic curve adjustment specifics for scenario 2
+
+## Cross-references
+
+- [W7 finding #1](W7_WEAK_POINTS_STRUCTURAL.md#находка-1) — this file addresses that finding.
+- [`docs/BENCHMARK_VS_MANET_2026-07-04.md`](BENCHMARK_VS_MANET_2026-07-04.md) §M7 — silicon-anchor score definition.
+- [`docs/M2_M4_FPGA_DECOMPOSED_PLAN.md`](M2_M4_FPGA_DECOMPOSED_PLAN.md) — Track B (FPGA-attestation) is the operational backup in scenarios 1 and 2.
+- [`README.md:26,167`](../README.md) — tape-out date and roadmap.
+
+---
+
+phi^2 + phi^-2 = 3