feat(formal): first DUT-bound property sets — fifo and mac prove under z3 - #2267
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…e under z3 The old props modules never instantiated anything: assertions floated over undriven mirrors of a port interface the generated modules never had, in SVA yosys cannot parse. The v1 sets bind the real DUTs in the yosys subset (immediate assertions) and are proven locally through the full chain (yosys prep -> write_smt2 -> yosys-smtbmc -s z3): fifo Status PASSED, mac Status PASSED -- the first genuine formal verdicts in the repo's history. uart's set is written and cross-checked by exhaustive simulation (256/256 bytes), but its .sby is parked as .blocked on #: the module carries an LDCE with real combinational feedback (module-var writes in the comb lowering) that no SMT model accepts. ci-gates gains section 11 (the seven formal layers and the rules they distill). Closes #2265.
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August 19, 2026 23:37
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Closes #2265. Refs #2266 #2239. First genuine formal verdicts in the repo's history (proven locally through the full smt chain before pushing); uart parked on the latch finding #2266; ci-gates §11 records the seven layers. docs/NOW.md updated.
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