fix(specs): convert braced TDD blocks in the two unparseable fpga specs - #2252
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vcd_conformance_compare.t27 and power_analysis.t27 wrote 64 tests, 7
invariants and 3 benches as 'name { ... }' blocks; the language's TDD
blocks are braceless and indentation-scoped (the 35 sibling specs use the
canonical form). Mechanical conversion with open/close pairing asserted
per family. Both specs parse; synth-readiness reports 100%/100% READY --
the honest lint gate's NOT-READY cause is repaired at the source.
Closes #2251.
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August 19, 2026 21:29
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Closes #2251. The named cause of the honest lint red: 64+7+3 braced blocks converted to the canonical braceless form; synth-readiness 100%/100% READY. docs/NOW.md updated.
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