sb: rb: Add multiple functions and modified settings - #2751
sb: rb: Add multiple functions and modified settings#2751khoung76642 wants to merge 109 commits into
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Summary: - Add function to let TID is same as EID - Add ADS7066 detection and set type to UNKNOWN if neither AD4058 nor ADS7066 is detected. - Add 100MHz, 312.5MHz, 100MHz buf0/1/2 clk lock event to BMC Test Plan: - Build code: Pass
Summary: - Move EVB thread to UBC thread Test Plan: - Build code: Pass
Summary: - Modify it will not keep sending clk event to BMC - Add clk status read value will include in event message. Test Plan: - Build code: Pass
…OW_ALERT_N pin logic Summary: - modified I3C_RAINBOW_ALERT_N this pin config from push-pull to open-drain - modified when start will keep High until read HAMSA boot version then will set to Low Test Plan: - Build code: Pass
Summary: - Version commit for sb-rb-20262101 Test Plan: - Build code: Pass
…t first This reverts commit 4908270.
…RAINBOW_ALERT_N logic from check all to HAMSA boot0 only
Summary: - Version commit for sb-rb-20262101 Test Plan: - Build code: Pass
Summary: - Modify shell command board_id judgment Test Plan: - Build code: Pass
Summary: - Add more vr_status in blackbox error_data Test Plan: - Build code: Pass
Summary: - svs flag will set/get vout command with offset(0:disable) or without offset(1:enable) - add shell command for set/get SVS_FLAG - add raa228249_get_vout_offset function Test Plan: - Build code: Pass
Summary: - add 312.5Mhz APLL lock status can get from shell cmd: "clock_status get all" Test Plan: - Build code: Pass
Summary: - add read svs_core_voltage from shell cmd: "rb_asic svs_core_voltage_get" Test Plan: - Build code: Pass
… thresholds Summary: - Fix TMP75 and TMP432 two-byte threshold get/set conversion - Decode threshold registers as signed 1/16°C raw values - Fix incorrect low-byte signed extension and negative threshold handling Test Plan: - Build code: Pass - Set and get positive threshold values: Pass - Set and get negative threshold values: Pass
Summary: - change polling rate to match item (7) MEDHA0/1_VDD = 2ms, VDDQC = 10ms, OWL_E/W_VDD/HAMSA=100ms - change the following default time windows - MEDHA0/1 LV1 = 100us - MEDHA0/1 LV2 = 100ms - MEDHA0/1 LV3 = 1000ms - change the following default thresholds - MEDHA0/1 LV1 = 1200A - MEDHA0/1 LV2 = 1523W - MEDHA0/1 LV3 = 1025W Test Plan: - Build code: Pass
Summary: - add "voltage svs_apply_offset" cli cmd and default is set to 1 (enabled). - voltage svs_apply_offset get - voltage svs_apply_offset set <1:enable / 0:disable> - add new command "voltage svs_asic_voltage" and default value is 1 (apply). - voltage svs_asic_voltage get - voltage svs_asic_voltage set <1:apply / 0:block> - modified when DC off, I3C_RAINBOW_ALERT_R_N will set to 1 - change fw update EID data from mctp to eeprom - change clock status CLK_GEN_100M_U86 from check LOSEVENT to check apll_lock_sts - add clock status 312.5MHz APLL lock status - modified pldm "get status" will not show in the log Test Plan: - Build code: Pass
Summary: - add "iris_smbus" temp sensor. - sensor polling add "iris_smbus" - sensor polling remove "VR vin" Test Plan: - Build code: Pass
Summary: - Add plat_ubc_otw_otp_init() to initialize UBC OTW/OTP related settings on EVT2 boards. - For supported UBC modules (DELTA/LUXSHARE), iterate UBC temp sensors and program: - reg 0x10 to remove protection - reg 0x51 (OTW/OWL) - reg 0x4F (OTP/OFL) - Skip initialization on non-EVT2 board revisions and unsupported UBC modules. Test Plan: - Build Code: Pass - Function check: Pass
Summary: - Version commit for sb-rb-20262301 Test Plan: - Build code: Pass
need fix bug and modified vr request This reverts commit 6685569.
Summary: - remove the ot_warning value in table will clear when vr polling flag has been set to 0 Test Plan: - Build code: Pass
Summary: - add power good status: U677, U678, U682 Test Plan: - Build code: Pass
…rc emc1413 address Summary: - modified 2nd src emc1413 address(fix address impact) - fix ot_warning function VR_HOT setting way(every error only set VR_HOT to 1 once so user can clear VR_HOT latch bit) Test Plan: Build code: Pass
Summary: - Version commit for sb-rb-20262901 Test Plan: Build code: Pass
Summary: - add RNS vr will have otw blackbox log and will send event log to bmc - add medha0/1 otw log - modified when otw is recover and status had been clear log status will be deasserted Test Plan: - Build code: Pass
Summary: - organize trigger_vr_hot and trigger_vr_hot Test Plan: - Build code: Pass
Summary: - modified sensor UCR, LCR, UNCR - jira-1702 Test Plan: - Build code: Pass
Summary: - VR_HOT restore will check asic temp and otw together - otw set VR_HOT will check VR_HOT setting mask Test Plan: Build code: Pass
Summary: - set MPS medha0/1 OPV2 to no avtion in all mode - update MPS UVP value - set limitation of ovp setting range in normal mode(voltage ovp set), it shold follow the OVP1 <=940mv - remove unused define Test Plan: Build code: Pass
Summary: - Level 2 threshold = change from 596W to 606W - Level 3 time_window = change from 500ms to 1000ms - Level 3 threshold = change from 347W to 360W Test Plan: Build code: Pass
Summary: - add UBC1, UBC2 event log Test Plan: Build code: Pass
Summary: - modify blackbox VR SMBALRT and Power FAULT - show all vr_status Test Plan: - Build code: Pass
Summary: - Common: add pldm_event_types: PLDM_CPER_EVENT - MMC send the CPER format to BMC in Fatal_Error 122 (0X7a) - jira-1040 Test Plan: Build code: Pass
…rror data issue Summary: - remove VR_HOT trigger from MMC even if ASIC triggers MEDHA0/1_MFIO24, HAMSA_MFIO22 - fix smbalert blackbox log error data will get wrong(vr_fault_get_error_data must input senser number not rail id) Test Plan: Build code: Pass
Summary: - Version commit for sb-rb-20263001 Test Plan: Build code: Pass
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This pull request has been imported. If you are a Meta employee, you can view this in D114592683. (Because this pull request was imported automatically, there will not be any future comments.) |
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common/service/ipmi/ipmi.c:131:12:Variable 'hdr' can be declared as pointer to const Some of the errors in these common code .cpp files are expected because the common code defines weak functions by default. These weak function implementations may result in cpp check error reports. |
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please take a look at the cpp check linter |
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@khoung76642 has updated the pull request. You must reimport the pull request before landing. |
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@khoung76642 has updated the pull request. You must reimport the pull request before landing. |
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Hi @waffle2k, After we checked, these 2 aren't bugs, they're an intentional weak-function/platform-override pattern that cppcheck can't reason about across link-time overrides. Please help us to merge in main branch after checking, Thanks! |
Summary:
-remove adc invalid log in post_adc_sensor_read
Test Plan:
Build code: Pass