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1. RISCV-EDGE-AI-CNN RISCV-EDGE-AI-CNN Public

   5-stage RISC-V RV32I processor + INT8 CNN hardware accelerator SoC for edge AI - synthesized on Xilinx Artix-7 at 100 MHz RTL in Verilog 2001

   Verilog 3

2. FPGA-Adaptive-Irrigation-Controller FPGA-Adaptive-Irrigation-Controller Public

   FPGA-Based Smart Agriculture Control System with Sensor Intelligence, Fault Detection, and Raspberry Pi Dashboard Integration

   SystemVerilog

3. cohesion-engine cohesion-engine Public

   MESI directory-based cache coherence bridge at the UCIe FDI boundary — SystemVerilog RTL, CDC, synthesis

   Verilog