A DSL compiler that generates instruction encoders for any architecture. Designed and written for rasi
A description of instruction encodings are written in a .rn file, Rune will read and emit a generated assembler.hpp which is pure inline. This can be dropped straight into your project.
(inst mov_ri64 (enc 0xB8+rd /imm64) (pattern (mov (reg64 $rd) (imm64 $imm))))
(inst mov_rr64 (enc 0x89 ModRM(r $rs rm $rd)) (pattern (mov (reg64 $rd) (reg64 $rs))))
(inst add_rr64 (enc 0x01 ModRM(r $rs rm $rd)) (pattern (add (reg64 $rd) (reg64 $rs))))
(inst sub_rr64 (enc 0x01 ModRM(r $rs rm $rd)) (pattern (sub (reg64 $rd) (reg64 $rs))))
(inst ret (enc 0xC3) (pattern (ret)))| Atom | Description |
|---|---|
| 0xNN | Literal byte |
| 0xNN+rd | Opcode byte with lower 3 bits of register encoded in |
| ModRM(r $x rm $y) | ModRM byte from two operands |
/imm8, /imm32, /imm64 |
Emit immediate value of given width |
/disp8, /disp32 |
Emit displacement |
/0 ... /7 |
ModRM opcode extension |
REX prefixes are derived from operand types automatically, reg64 and imm64 impl REX.W. Additionally, extended registers which is r8 to r15 set REX.R/B automatically.
rune x86_64.rn -o assembler.hpp --ns rasi::x86_64 --prefix emit_| Flag | Default | Description |
|---|---|---|
-o <file> |
assembler.hpp |
Output file |
--ns <ns> |
x86_64 |
C++ namespace |
--prefix <p> |
emit_ |
Function name prefix |
--case <lower/upper> |
lower |
Instruction name casing |