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Add Smrnmi support - #16

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cp0613 merged 7 commits into
XUANTIE-RV:opensbi-v1.7-devfrom
cp0613:smrnmi
Aug 7, 2026
Merged

Add Smrnmi support#16
cp0613 merged 7 commits into
XUANTIE-RV:opensbi-v1.7-devfrom
cp0613:smrnmi

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@cp0613 cp0613 commented Aug 7, 2026

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evvoevod and others added 7 commits July 27, 2026 19:43
RNMI handlers use MNSCRATCH instead of MSCRATCH and need separate scratch
space from regular trap handling. Add tmp1 for RNMI context while tmp0
remains for regular traps.

Signed-off-by: Evgeny Voevodin <evvoevod@tenstorrent.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Add CSR definitions (MNSCRATCH, MNSTATUS, MNEPC, MNCAUSE) and bit definitions
(MNSTATUS_NMIE, MNSTATUS_MNPV, MNSTATUS_MNPP). Also add SBI_HART_EXT_SMRNMI to
the hart extension enumeration.

Signed-off-by: Evgeny Voevodin <evvoevod@tenstorrent.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Nylon Chen <nylon.chen@sifive.com>
Implement basic Resumable NMI (RNMI) handler support for the RISC-V
Smrnmi extension.

The new _trap_rnmi_handler assembly entry point saves context using the
Smrnmi MN* CSRs (MNSCRATCH, MNEPC, MNSTATUS, MNCAUSE) and returns via
mnret. It dispatches to sbi_trap_rnmi_handler(), which optionally calls
a platform-specific ops->rnmi_handler callback for actual NMI
processing. If no platform handler is registered or it fails, the
event is reported as an unhandled NMI.

The RNMI handler reuses the generic trap context structure but stores MN*
CSR values (MNEPC, MNSTATUS, MNCAUSE) into the corresponding generic
fields (mepc, mstatus, cause) for compatibility with existing trap
infrastructure.

Signed-off-by: Evgeny Voevodin <evvoevod@tenstorrent.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
… checks

Smrnmi detection and enablement in the following commits will happen
before any trap-based mechanism. As it relies on device tree, move
sbi_platform_extensions_init() to the beginning of hart_detect_features().

Signed-off-by: Evgeny Voevodin <evvoevod@tenstorrent.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
…tection

The location of the RNMI/E trap vectors in the Smrnmi extension is
implementation-defined, so platforms with vendor-specific NMI vector
mechanisms must install the firmware's NMI entry points themselves.

Add an smrnmi_handlers_init() callback to sbi_platform_operations that
receives the firmware entry points and lets platform code install them
at the hardware-specific vector locations. Two pointers are passed:

  - _trap_rnmi_handler: the dedicated RNMI entry point that saves
    context using the Smrnmi MN* CSRs and returns via mnret.
  - _trap_handler: the regular M-mode trap entry since RNME is taken
    as a regular M-mode trap with NMIE=0.

When Smrnmi is present, install the platform's NMI vectors via the new
callback, initialize MNSCRATCH with the per-hart scratch pointer, and
set MNSTATUS.NMIE.

Smrnmi-enabled platforms must register smrnmi_handlers_init; if the
extension is detected but no callback is registered, sbi_panic() is
called since enabling NMIs without handlers in place would route
subsequent traps into nowhere.

Signed-off-by: Evgeny Voevodin <evvoevod@tenstorrent.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Add the xuantie platform callbacks required by the common Smrnmi
(Resumable NMI) infrastructure: smrnmi_handlers_init to program the
hardware NMI vector, and rnmi_handler to process the NMI when it fires.

xuantie vectors RNMI through a single indirectly-accessed rnmi_addr_base
register (selected via the miselect/mireg CSR indirect window). NMI is
vectored to rnmi_addr_base and double-trap to rnmi_addr_base + 2K, which
requires the RNMI asm entry to be 4K-aligned with the double-trap entry
2K above it. That asm layout is not in place yet, so smrnmi_handlers_init
is left as a TODO placeholder documenting the intended programming; the
NMI source handling in rnmi_handler is likewise a placeholder.

The callbacks are registered into generic_platform_ops when the
QUIRK_XUANTIE_RNMI quirk is present, matched via the "xuantie,rnmi"
compatible.

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
xuantie vectors RNMI through rnmi_addr_base (low 12 bits hardwired to 0)
and derives the double-trap (RNME) entry from base + 2K. Align
_trap_rnmi_handler to 4K and place a dedicated _trap_rnme_handler exactly
2K above it, so a platform can program rnmi_addr_base with the RNMI base
and have both vectors land on the correct entries.

_trap_rnme_handler reuses the generic trap handler since RNME is taken as
a regular M-mode trap with NMIE=0. sbi_hart.c now passes it as the RNME
handler to smrnmi_handlers_init.

The rnmi_addr_base programming itself is still a TODO in
xuantie_smrnmi_handlers_init; the layout-validation prints added earlier
confirm this arrangement (RNMI at a 4K base, RNME at base + 2K).

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
@cp0613
cp0613 merged commit b938d0a into XUANTIE-RV:opensbi-v1.7-dev Aug 7, 2026
2 of 3 checks passed
@cp0613
cp0613 deleted the smrnmi branch August 7, 2026 12:32
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2 participants