Found while building the #1021 execution differential (PR #1039): a --target cortex-r5 --relocatable object's in-module direct call carries reloc type 10 (R_ARM_THM_CALL) although the placeholder instruction is an A32 BL word (0xEB000000, ARM state).
Repro: compile scripts/repro/popcnt_r11_clobber_1021.wat with --target cortex-r5 --all-exports --relocatable --no-optimize; .rel.text shows type 10 func_2 on an eb000000 word.
Consequence: any consumer that trusts the declared type — a real linker, or a harness — will patch Thumb halfwords into an ARM-state instruction (or emit an interwork veneer), producing an invalid instruction. The #1021 harness first died UC_ERR_INSN_INVALID on exactly this and now patches by execution mode as a workaround (documented in load_elf's docstring).
Expected: R_ARM_CALL (28) on ARM-state BL sites; R_ARM_THM_CALL only on Thumb BL sites. Likely the ELF builder reuses the Thumb reloc constant on the A32 path.
Refs #1021, #615.
🤖 Generated with Claude Code
Found while building the #1021 execution differential (PR #1039): a
--target cortex-r5 --relocatableobject's in-module direct call carries reloc type 10 (R_ARM_THM_CALL) although the placeholder instruction is an A32BLword (0xEB000000, ARM state).Repro: compile
scripts/repro/popcnt_r11_clobber_1021.watwith--target cortex-r5 --all-exports --relocatable --no-optimize;.rel.textshowstype 10 func_2on aneb000000word.Consequence: any consumer that trusts the declared type — a real linker, or a harness — will patch Thumb halfwords into an ARM-state instruction (or emit an interwork veneer), producing an invalid instruction. The #1021 harness first died
UC_ERR_INSN_INVALIDon exactly this and now patches by execution mode as a workaround (documented inload_elf's docstring).Expected: R_ARM_CALL (28) on ARM-state BL sites; R_ARM_THM_CALL only on Thumb BL sites. Likely the ELF builder reuses the Thumb reloc constant on the A32 path.
Refs #1021, #615.
🤖 Generated with Claude Code